1. Field of the Invention
The present invention relates generally to a current-controlled FET Pi attenuator, and more particularly to a current-controlled FET Pi attenuator operable under low voltage supply conditions.
2. Description of the Background Art
A signal attenuator is a device that, as the name implies, reduces the magnitude and therefore the electrical energy of an incoming waveform signal. The removed electrical energy is dissipated as heat.
Attenuation is commonly used in electrical circuits. For example, signal attenuators are commonly used in audio circuits, radio frequency (RF) circuits, automatic gain control (AGC) circuits, etc. Generally, a waveform signal is amplified to a desired maximum level and then attenuated when a lower energy level is desired. This attenuation is generally preferred because during amplification of a signal any noise on the signal is also amplified.
Attenuation of a waveform signal is somewhat more complicated than attenuation of a DC signal. A DC signal may be attenuated merely by increasing a resistance value. However, for circuits having audio or RF waveform signals, the attenuation must decrease the signal magnitude without altering or distorting the waveform, without causing phase disturbances, without affecting a signal bandwidth, etc.
FIG. 1 shows a prior art voltage-controlled field effect transistor (FET) resistor. An interesting and useful characteristic of a FET is the ability to control a current flowing through it by an applied control voltage. A voltage VDS applied across the drain and source terminals (with the polarity depending on whether the FET is a n-type or a p-type FET) may cause a current ID to flow through the channel region of the FET. The prior art voltage-controlled FET resistor employs a varying gate voltage bias VGS across the gate and source terminals of the prior art voltage-controlled FET resistor to control the flow of current ID between the drain terminal and the source terminal.
This is accomplished by using the gate voltage bias VGS to control the size of depletion regions inside the FET. The depletion regions are regions depleted of charge carriers where electrical current cannot flow. Controlling these depletion regions allows control of the current ID flowing between the drain and the source. When the gate voltage bias VGS reaches a threshold or pinch-off value Vt, no current can flow through the FET. The widening of the depletion regions and the corresponding narrowing of the channel therefore causes the channel resistance rDS to increase. Therefore, for a relatively small drain-to-source voltage bias VDS, the FET acts as a linear resistor, with a channel resistance rDS being controlled by the gate voltage bias VGS. The gate voltage bias VGS in the prior art voltage controlled FET resistor therefore controls the resistance of the FET.
The prior art voltage-controlled FET resistor suffers from drawbacks, however. One drawback is that the prior art voltage-controlled FET resistor suffers from a restricted control voltage range, and therefore a restricted attenuation range. A FET typically has a threshold (or turn-on) voltage Vt of about 800 millivolts (mV). A typical FET will not exhibit any appreciable source-drain current unless the gate terminal is biased above the threshold voltage Vt. This is in contrast to a typical supply voltage of about 1.5 to 1.8 volts. These typical values give the prior art voltage-controlled FET resistor a control voltage range of no more than 800 mV (i.e., the voltage range between the threshold voltage Vt and the supply voltage).
Another drawback in the prior art signal attenuator is the dependence of the control voltage on the supply voltage. The control voltage at the gate terminal changes with variations in the power supply voltage. This may make the attenuation range even more abbreviated.
What is needed, therefore, are improvements in signal attenuators operating under low power supply conditions.